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Professor (Tenured)

ShanghaiTech University

Professor at the School of Information Science and Technology, leading research in energy-efficient circuits, FPGA architectures, and AI IC design.

• Principal Investigator for multiple National Natural Science Fund projects
• Director of Shanghai Engineering Research Center of Energy Efficient and Custom AI IC

Adjunct Associate Professor

National University of Singapore

Collaborating with the Department of Electrical and Computer Engineering on research and academic projects.

Co-Director & Scientist

Institute for Infocomm Research (I2R), A*STAR

Led the I2R-BYD Joint Lab, focusing on autonomous electric vehicle technologies.

Assistant Professor

National University of Singapore

Conducted research and taught courses in electrical and computer engineering.

Affiliate Researcher

IMEC, Belgium

Researcher in the Design Technology Division, focusing on VLSI and FPGA design.

Technical Program Chair

ISICAS 2022

Editor-in-Chief

IEEE Transactions on Circuits and Systems II: Express Briefs

Associate Editor-in-Chief

IEEE Transactions on Circuits and Systems II: Express Briefs

TPC Co-Chair

ISICAS 2020

Associate Editor

IEEE Transactions on Circuits and Systems I: Regular Papers

General Co-Chair

ASP-DAC 2014

Associate Editor

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Program Co-Chair

FPT 2013

Member

ASP-DAC Steering Committee

Chair

Singapore Chapter of the IEEE Circuits and Systems (CAS) Society

Associate Editor

IEEE Transactions on Circuits and Systems II: Express Briefs

Program Co-Chair

FPT 2010

Associate Editor

Journal of Low Power Electronics

Program Committee Member

DAC, DATE, ASP-DAC, FPGA, FPL, FPT

PhD

Katholieke Universiteit Leuven

Electrical Engineering

M.Eng

National University of Singapore

Electrical Engineering

B.S

Zhejiang University

Electrical Engineering

Best Paper Award

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Awarded for the paper 'Hierarchical and Recursive Floorplanning Algorithm for NoC-Based Scalable Multi-Die FPGAs'.

EDAthon 2021 Champion

IEEE CEDA Hong Kong Chapter

Won the championship in the EDAthon 2021 competition, showcasing expertise in electronic design automation.

First Place, DAC 2021 System Design Contest

Design Automation Conference (DAC)

Led a team to achieve first place in the DAC 2021 System Design Contest.

Second Place, DAC 2020 System Design Contest

Design Automation Conference (DAC)

Achieved second place in the DAC 2020 System Design Contest.

Best Paper Award

Computing Frontiers Conference

Awarded for the paper 'Quality Optimization of Resilient Applications under Temperature Constraints'.

Highlight Paper Award

International Solid-State Circuits Conference (ISSCC)

Awarded for the paper 'An Ultra Low-Energy/Frame Multi-standard JPEG Co-processor in 65nm CMOS with Sub/Near Threshold Power Supply'.