Title:

Physical Design and Smart Home Cybersecurity: The Marriage of CAD and Cyberphysical System

Abstract:

In this talk, I will begin with the discussion on a CAD problem, namely, the interconnect optimization which is a key process for handling ever increasing interconnect delay in the nanometer VLSI design. I will highlight my experience in tackling a major open problem in the field, namely, the timing driven minimum cost buffer insertion problem. My work designs the first fully polynomial time approximation scheme for this problem, which can approximate the optimal solution within a factor of 1+e running in O(m2n2b/e3+n3b2/e) time for any 0<e<1.
I will then move on to smart home system and cybersecurity.  The massive deployment of advanced metering infrastructure and home energy management system has mandated a transformative shift of the classical grid into a more reliable and secure grid. A smart home system is critical in this infrastructure as it controls all the end use components of a grid. Despite its importance, such a system is vulnerable to various. In this talk, I will describe several of our recent works on smart home cyberthreat analysis and defense technology development, such as partially observable Markov decision process (POMDP) based pricing cyberattack detection, and cross entropy optimization based Feeder Remote Terminal Unit (FRTU) deployment optimization for energy theft protection. I will conclude the talk with some of the ongoing research conducted in my group as well as our international collaborators.

Bio:

Shiyan Hu received his Ph.D. in Computer Engineering from Texas A&M University in 2008. He is currently an Associate Professor in the Department of Electrical and Computer Engineering at Michigan Tech., where he is the Founding Director of Michigan Tech Cyberphysical System Research Group and the Director of Michigan Tech VLSI CAD Research Lab. He has been a Visiting Professor at IBM Research (Austin) during Summer 2010. His research interests are in the area of Computer-Aided Design of VLSI Circuits and Smart Home Cybersecurity, and he has published over 80 technical papers in the refereed journals and conferences. He is a recipient of ACM SIGDA Richard Newton DAC Scholarship (as the faculty advisor), a recipient of Faculty Invitation Fellowship from Japan Society for the Promotion of Science (JSPS), and a recipient of the National Science Foundation (NSF) CAREER award. His papers have been nominated for IEEE/ACM William J. McCalla Best Paper Award in 2009 and IBM Pat Goldberg Best Paper Award in 2008 and 2010. His microfluidic biochip physical synthesis research was featured in the front cover of IEEE Transactions on Nanobiosciences in March 2014, which has been highlighted in IEEE Spectrum, Communications of ACM, Science Daily, Daily News and various other media. He is among 62 researchers invited from the European Union and the United States to attend the Frontiers of Engineering Symposium of National Academy of Engineering in 2014.
He is an Associate Editor for IEEE Transactions on Circuits and Systems II, and Guest Editor for IEEE Transactions on Computers, IEEE Transactions on Industrial Informatics and ACM Transactions on Embedded Computing Systems. He has served as TPC Subcommittee Chairs for the premier conferences DAC 2014, 2015 and ICCAD 2011, and as TPC members for various conferences for more than 50 times. He is a Senior Member of IEEE.