-
[GLSVLSI] Yankun Zhu*, Siting Liu, Liyu Yang* and Pingqiang Zhou,
"LDL-SCA: Linearized Deep Learning Side-Channel Attack Targeting Multi-tenant FPGAs,"
Great Lakes Symposium on VLSI, pp. 583-587, 2024.
-
[CSTIC] Jiang Sun* and Pingqiang Zhou,
"A Customized Model for Defensing Against Adversarial Attacks,"
Conference of Science and Technology for Integrated Circuits, pp. 1-3, 2024.
-
[DAC] Haochuan Wan, Linjie Ma, Antong Li, Pingqiang Zhou, Jingyi Yu, and Xin Lou,
"ZeroTetris:
A Spacial Feature Similarity-based Sparse MLP Engine for Neural Volume Rendering,"
ACM/EDAC/IEEE Design Automation Conference, Article 224, pp. 1-6, 2024.
-
[CICC] Zhechen Yuan, Binzhe Yuan, Yuhan Gu, Yueyang Zheng, Yunxiang He, Xuexin Wang, Chaolin Rao, Pingqiang Zhou, Jingyi Yu, and Xin Lou,
"A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA,"
IEEE Custom Integrated Circuits Conference, pp. 1-2, 2024.
-
[ASP-DAC] Hongjian Zhou*, Yaguang Li*, Xin Xiong* and Pingqiang Zhou,
"A Transferable GNN-based Multi-Corner Performance Variability Modeling for Analog ICs,"
IEEE Asia and South Pacific Design Automation Conference, pp. 411-416, 2024. (Best Paper Award Nomination)
-
[ASICON] Yuan Li* and Pingqiang Zhou,
"Full-Chip Voltage Prediction via Graph Attention Based Neural Networks,"
IEEE International Conference on ASIC, 2023. (Invited)
-
[AICAS] Haochuan Wan, Chaolin Rao, Yueyang Zheng, Pingqiang Zhou and Xin Lou,
"A Systolic Array with Activation Stationary Dataflow for Deep Fully-Connected Networks,"
IEEE 5th International Conference on Artificial Intelligence Circuits and Systems, 2023.
-
[GLSVLSI] Yankun Zhu*, Jindong Zhou* and Pingqiang Zhou,
"Exploring Remote Power Attacks Targeting Parallel Data Encryption On Multi-Tenant FPGAs,"
Great Lakes Symposium on VLSI, pp. 57-62, 2023.
-
[CSTIC] Yang Li* and Pingqiang Zhou,
"Fast NoC Router Latency Estimation Using Machine Learning,"
China Semiconductor Technology International Conference, pp. 1-3, 2023.
-
[CSTIC] Ziwen Li*, Yu Ma* and Pingqiang Zhou,
"A Hybrid Training Framework for
Speeding Up the Inference Process of Spiking Neural Networks,"
China Semiconductor Technology International Conference, pp. 1-3, 2023.
-
[DATE] Yuanchen Qu*, Yu Ma* and Pingqiang Zhou,
"A Speed- and Energy-Driven Holistic Training Framework for Sparse CNN Accelerators,"
Design, Automation and Test in Europe Conference, pp. 1-6, 2023. (Best Paper Award Nomination)
-
[APCCAS] Haochuan Wan, Chaolin Rao, Yueyang Zheng, Pingqiang Zhou, Jingyi Yu and Xin Lou,
"SME: A Systolic Multiply-accumulate Engine for MLP-based Neural Network,"
IEEE Asia Pacific Conference on Circuits and Systems, pp. 270-274, 2022.
-
[APCCAS] Chaolin Rao, Yueyang Zheng, Haochuan Wan, Pingqiang Zhou, Jingyi Yu and Xin Lou,
"An Energy Efficient Precision Scalable Computation Array for Neural Radiance Field Accelerator,"
IEEE Asia Pacific Conference on Circuits and Systems, pp. 260-264, 2022. (Best Paper Award Nomination)
-
[ISCAS] Yuanchen Qu*, Lu Wang*, Qingfu Xu and Pingqiang Zhou,
"Two-Stage
Energy Efficiency Optimization of Switched-Capacitor Converters for IoT Systems,"
IEEE International Symposium on Circuits and Systems, pp. 3068-3072, 2022.
-
[SOCC] Yueyang Zheng, Chaolin Rao, Haochuan Wan, Yuliang Zhou, Pingqiang Zhou, Jingyi Yu and Xin Lou,
"An RRAM-based Neural Radiance Field Processor,"
IEEE International System-on-Chip Conference, pp. 1-5, 2022.
-
[SIGGRAPH Asia] Chaolin Rao, Huangjie Yu, Haochuan Wan, Jindong Zhou*, Yueyang Zheng,
Yu Ma*, Anpei Chen, Minye Wu, Binzhe Yuan, Pingqiang Zhou, Xin Lou and Jingyi Yu,
"ICARUS:
A Specialized Architecture for Neural Radiance Field Rendering,"
SIGGRAPH Asia, 2022.
-
[ASP-DAC] Chengrui Zhang*, Yu Ma* and Pingqiang Zhou,
"Thermal-Aware Layout
Optimization and Mapping Methods for Resistive Neuromorphic Engines,"
IEEE Asia and South Pacific Design Automation Conference, pp. 50-55, 2022.
-
[AsianHOST] Jinxin Dong* and Pingqiang Zhou,
"Detecting Adversarial Examples Utilizing Pixel Value Diversity,"
Asian Hardware Oriented Security and Trust Symposium, pp. 1-6, 2021. (Best Paper Award Nomination)
-
[CSTIC] Jindong Zhou∗, Youliang Jing and Pingqiang Zhou,
"The Study
of TSV-Induced and Strained Silicon-Enhanced Stress in 3D-IC,"
China Semiconductor Technology International Conference, pp. 1-3, 2021.
-
[CSTIC] Linfeng Zheng∗ and Pingqiang Zhou,
"Optimizing
the Energy Efficiency of Switched-Capacitor Converters in Multiprocessor System-on-Chips with a Preset DVFS Policy,"
China Semiconductor Technology International Conference, pp. 1-3, 2021. (Best Poster Award)
-
[APCCAS] Yu Ma*, Chengrui Zhang* and Pingqiang Zhou,
"Efficient Techniques for Extending Service Time for Memristor-based Neural Networks,"
IEEE Asia Pacific Conference on Circuits and Systems, pp. 81-84, 2021.
-
[GLSVLSI] Yu Ma*, Linfeng Zheng* and Pingqiang Zhou,
"Tolerating Stuck-at Fault and Variation in Resistive Edge Inference Engine via Weight Mapping,"
Great Lakes Symposium on VLSI, pp. 313-318, 2021.
-
[ASP-DAC] Chenguang Zhang* and Pingqiang Zhou,
"A Quantized Training Framework for Robust and Accurate ReRAM-based Neural Network Accelerators," IEEE
Asia and South Pacific Design Automation Conference, pp. 43-48, 2021.
-
[ASP-DAC] Yu Ma* and Pingqiang Zhou, "Efficient Techniques for Training the Memristor-based Spiking Neural Networks Targeting Better Speed, Energy and Lifetime," IEEE
Asia and South Pacific Design Automation Conference, pp. 390-395, 2021.
-
[AsianHOST] Yuan Liu* and Pingqiang Zhou,
"Defending Against Adversarial Attacks in Deep Learning
with Robust Auxiliary Classifiers Utilizing Bit Plane Slicing," IEEE
Asian Hardware Oriented Security and Trust Symposium, pp. 1-4, 2020.
-
[ICSICT] Yuanchen Qu* and Pingqiang Zhou,
"An Improved Design
of Hybrid Integrated Voltage Regulator Based on DLDO and SCVR," IEEE
International Conference on Solid-State and Integrated Circuit Technology, pp. 1-3, 2020.
-
[ICSICT] Chengrui Zhang* and Pingqiang Zhou,
"Improved Hierarchical IR Drop Analysis
in Homogeneous Circuits," IEEE International Conference on Solid-State
and Integrated Circuit Technology, pp. 1-3, 2020.
-
[ASICON] Yu Ma*, Dingcheng Jia*, Wei Gao* and Pingqiang Zhou,
"Addressing Aging Issues in Heterogeneous Three-Dimensional Integrated
Circuits," IEEE International Conference on ASIC, pp. 1-4, 2019. (Invited)
-
[ASICON] Yu Ma*, Linfeng Zheng* and Pingqiang Zhou,
"CoDRAM: A Novel
Near Memory Computing Framework with Computational DRAM," IEEE
International Conference on ASIC, pp. 1-4, 2019.
-
[ASICON] Yu Ma*, Dingcheng Jia*, Huifan Zhang*, Ruoyu Wang* and
Pingqiang Zhou, "A Compact Memory Structure based on 2T1R against
Single-Event Upset in RRAM Arrays," IEEE International Conference on ASIC, pp. 1-4, 2019.
-
[CSTIC] Dingcheng Jia∗ and Pingqiang Zhou,
"Effective
Activating Compensation Logic for Drams in 3D-ICs,"
China Semiconductor Technology International Conference, pp. 1-3, 2019.
-
[DATE]
Lu Wang*, Leilei Wang*, Dejia Shang*, Cheng Zhuo and Pingqiang Zhou,
"Optimizing
the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters,"
Design, Automation and Test in Europe Conference, pp. 836-841, 2019.
-
[ICSICT] Rusong Weng∗, Yaguang Li∗, Wei Gao∗, Leilei Wang∗, Xufeng Kou and Pingqiang Zhou,
"Deep
Learning for Spatial Supply Noise Estimation in a Processor Chip,"
IEEE International Conference on Solid-State and Integrated Circuit Technology, pp. 1-4, 2018.
-
[DAC] Yaguang Li*, Cheng Zhuo and Pingqiang Zhou, "A
System-Level Framework for Online Power and Supply Noise Prediction in
Processor Chips," ACM/EDAC/IEEE Design Automation Conference, 2018. (Poster session)
-
[PLANS] Jiuxin Zhang* and Pingqiang Zhou, "Integrating Low-Resolution Surveillance Camera
and Smartphone Inertial Sensors for Indoor Positioning," IEEE/ION Position Location
and Navigation Symposium, pp. 410-416, 2018.
-
[CSTIC] Leilei Wang∗ and Pingqiang Zhou,
"An Improved
Leakage-Driven Runtime Decap Modulation Algorithm for Microprocessors,"
China Semiconductor Technology International Conference, pp. 1-3, 2018.
-
[AMS] Yaguang Li*, Cheng Zhuo and Pingqiang Zhou, "A
System Level Framework for Online Supply Noise Prediction,"
International Workshop on Design Automation for Analog and Mixed-Signal Circuits, 2017.
-
[ASICON] Yaguang Li*, Pingqiang Zhou, "An Outlier Detection Method
and its Application to Multicore-Chip Power Estimation,"
IEEE International Conference on ASIC, pp. 460-463, 2017. (Invited)
-
[AsianHOST] Zhang Chen*, Pingqiang Zhou, Tsung-Yi Ho and Yier Jin,
"How
Secure is Split Manufacturing in Preventing Hardware Trojan?," IEEE
Asian Hardware Oriented Security and Trust Symposium, pp. 1-6, 2016.
-
[CAD/CG] Kai Liao* and Pingqiang Zhou, "A Study about Task-Based DVFS
Policy," IEEE International Conference on
Computer-Aided Design and Computer Graphics, 2016.
-
[ICSICT] Pingqiang Zhou, "Design and CAD of Noise Sensors for On-Die
Supply Voltage Emergency Detection,"
IEEE International Conference on Solid-State and Integrated Circuit
Technology, pp. 593-596, 2016. (Invited)
-
[CSTIC] Leilei Wang∗ and Pingqiang Zhou,
"Leakage
Power Reduction in Multicore Chips via Online Decap Modulation,"
China Semiconductor Technology International Conference, pp. 1-3, 2016. (Best Student Paper Award Nomination)
-
[DAC] Xiaochen Liu*, Shupeng Sun, Pingqiang Zhou, Xin Li and Haifeng Qian,
"A Statistical
Methodology for Noise Sensor Placement and Full-Chip Voltage Map
Generation," ACM/EDAC/IEEE Design
Automation Conference, pp. 1-6, 2015.
-
[ICSICT] Pingqiang Zhou,
"Design
and Optimization of On-Chip Voltage Regulators for High Performance Applications,"
IEEE International Conference on Solid-State and Integrated Circiut Technology,
pp. 1-4, 2014. (Invited)
-
[IPDPS] Jieming Yin, Pingqiang Zhou, Sachin S. Sapatnekar and Antonia Zhai, "Energy-Efficient
Time-Division Multiplexed Hybrid-Switched NoC for Heterogeneous Multicore
Systems," IEEE International Parallel and Distributed Processing Symposium, pp.
293-303, 2014.
-
[DATE] Pingqiang Zhou, Vivek Mishra and Sachin S. Sapatnekar, "Placement
Optimization of Power Supply Pads Based on Locality," Design, Automation and Test in Europe Conference, pp. 1655-1660, 2013.
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[ICCAD] Pingqiang Zhou, Bongjin Kim, Wonho Choi, Chris H. Kim and Sachin S. Sapatnekar, "Optimization of On-Chip Switched-Capacitor DC-DC Converters for High-Performance Applications," IEEE/ACM International Conference on Computer-Aided Design, pp. 263-270, 2012.
-
[ICCAD] Jianxin Fang, Saket Gupta, Sanjay Kumar, Sravan Marella, Vivek Mishra, Pingqiang Zhou and Sachin Sapatnekar, "Circuit Reliability: From Physics to Architectures (Embedded Tutorial)," IEEE/ACM International Conference on Computer-Aided Design, pp. 243-246, 2012.
-
[ISLPED] Jieming Yin, Pingqiang Zhou, Anup P. Holey, Sachin S. Sapatnekar and Antonia Zhai, "Energy Efficient Non-Minimal Path On-chip Interconnection Network for Heterogeneous Systems," ACM/IEEE International Symposium on Low Power Electronics and Design, pp. 57-62, 2012.
-
[CICC] Pingqiang Zhou, Dong Jiao, Chris H. Kim and Sachin S. Sapatnekar, "Exploration of On-Chip Switched-Capacitor DC-DC Converter for Multicore Processors Using a Distributed Power Delivery Network," IEEE Custom Integrated Circuits Conference, pp. 1-4, 2011.
-
[TECHON] Pingqiang Zhou, Jieming Yin, Antonia Zhai and Sachin S. Sapatnekar, "NoC Design and Performance Optimization," SRC TECHON, 2011.
-
[ISLPED] Pingqiang Zhou, Jieming Yin, Antonia Zhai and Sachin S. Sapatnekar, "NoC Frequency Scaling with Flexible-Pipeline Routers,"
ACM/IEEE International Symposium on Low Power Electronics and Design, pp. 403-408, 2011.
-
[ASP-DAC] Pingqiang Zhou, Ping-Hung Yuh and Sachin S. Sapatnekar, "Application-Specific 3D Network-on-Chip Design Using Simulated Allocation," Asia-South Pacific Design Automation Conference, pp. 517-522, 2010. (Best Paper Award Nomination)
-
[ASP-DAC] Pingqiang Zhou, Karthikk Sridharan and Sachin S. Sapatnekar, "Congestion-Aware Power Grid Optimization for 3D Circuits Using MIM and CMOS Decoupling Capacitors," Asia-South Pacific Design Automation Conference, pp. 179-184, 2009.
-
[SEMATECH] Pingqiang Zhou, Jie Gu, Pulkit Jain, Chris H. Kim and Sachin S. Sapatnekar, "Reliable Power Delivery for 3D ICs," Sematech Workshop on Design and Test Challenges for 3D ICs, 2008.
-
[ICCAD] Pingqiang Zhou, Yuchun Ma, Zhouyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong and Qiang Zhou, "3D-STAF: Scalable Temperature and Leakage Aware Floorplanning for Three-dimensional Integrated Circuits," IEEE/ACM International Conference on Computer-Aided Design, pp. 590-597, 2007.
-
[CAD/CG]
Pingqiang Zhou, Yuchun Ma,Qiang Zhou and Xianlong Hong, "Thermal Effects with Leakage Power Considered in 2D/3D Floorplanning," IEEE International Conference on Computer-Aided Design and Computer Graphics, pp. 338-343, 2007.